Se creará el driver para la lcd grafica 96x64 con interfaz de comunicación RSPI. Se mostrará un mensaje de 7 líneas.
void R_RSPI0_Create(void)
{
MSTP(RSPI0)
= 0; //Enable SPI0
//PORT C DDR
PORTC.DDR.BIT.B5 = 1; //An output pin RSPCK output
PORTC.DDR.BIT.B6 = 1; //An output pin MOSI output
PORTC.DDR.BIT.B7 = 0; //An input pin MISO = input
PORTC.ICR.BIT.B7 = 1;
// inicializa
pines
PORTC.DDR.BIT.B2 = 1; // como salida
LCD-CS
PORT5.DDR.BIT.B1 = 1; // como salida
LCD-RS
PORTC.DDR.BIT.B3 = 1; // como salida
PORTC.DR.BIT.B3 = 0; // Pull RSTOUT# inverting buffer low so
RSTOUT# goes high, releasing reset state.
//PFGSPI register
IOPORT.PFGSPI.BIT.RSPIS = 0; //PC as the SPI-A
IOPORT.PFGSPI.BIT.RSPCKE = 1; //RSPCKA pin is enable
IOPORT.PFGSPI.BIT.MOSIE = 1; //MOSIA pin is enable
IOPORT.PFGSPI.BIT.MISOE = 1; //MISOA pin is enable
IOPORT.PFGSPI.BIT.SSL0E = 0; //SSL0A pin is disable
IOPORT.PFGSPI.BIT.SSL1E = 0; //SSL1A pin is disable
IOPORT.PFGSPI.BIT.SSL2E = 0; //SSL2A pin is disable
IOPORT.PFGSPI.BIT.SSL3E = 0; //SSL3A pin is disable
//SPPCR register
RSPI0.SPPCR.BIT.SPLP = 0; //Disable loopback mode
RSPI0.SPPCR.BIT.SPLP2 = 0; //Disable loopback mode
RSPI0.SPPCR.BIT.SPOM = 0; //CMOS output
RSPI0.SPPCR.BIT.MOIFV = 0; //MOSI idle fixed value equal 0
RSPI0.SPPCR.BIT.MOIFE = 0; //MOSI output value equal final data
from previous transfer
//SPBR register
//Determine base frequency of operation
//With 0 and BRDV can this options of
frequency:
//BRDV = 0 => 24MHz
//BRDV = 1 => 12MHz
//BRDV = 2 => 6MHz
//BRDV = 3 => 3MHz
RSPI0.SPBR = 0x0;
//BRDV = 3 =>
3MHz
//SPDCR register
RSPI0.SPDCR.BIT.SPFC = 0; //Number of frames
RSPI0.SPDCR.BIT.SLSEL = 0; //SSL0 to SSL3 as output
RSPI0.SPDCR.BIT.SPRDTD = 0; //SPDR values are read from the receive
buffer
RSPI0.SPDCR.BIT.SPLW = 0; //SPDR is accessed in words
//SPCKD register
RSPI0.SPCKD.BIT.SCKDL = 0; //1 RSPCK delay for clock
//SSLND register
RSPI0.SSLND.BIT.SLNDL = 0; //1 RSPCK delay for slave select
negation
//SPND register
RSPI0.SPND.BIT.SPNDL = 0; //1 RSPCK + 2 PCLK delay for next-access
//SPCR2 register
RSPI0.SPCR2.BIT.SPPE = 0; //Parity disable
RSPI0.SPCR2.BIT.SPOE = 0; //Parity mode
RSPI0.SPCR2.BIT.SPIIE = 0; //Disable idle interrupt
RSPI0.SPCR2.BIT.PTE = 0; //Disable the self-diagnostics of the
parity circuit
//SPCMOD0 register (Graphic display)
RSPI0.SPCMD0.BIT.CPHA = 0; //Data sampling on odd edge, data
variation on even edge
RSPI0.SPCMD0.BIT.CPOL = 0; //RSPCK = 0 when idle
RSPI0.SPCMD0.BIT.BRDV = 0; //Bit Rate = 3MHz (according with SPBR
register)
RSPI0.SPCMD0.BIT.SSLA = 0; //SSL3-A for graphic display
RSPI0.SPCMD0.BIT.SSLKP = 0; //Negative all SSL signals upon
completion of transfer
RSPI0.SPCMD0.BIT.SPB = 7; //Data length = 8bits
RSPI0.SPCMD0.BIT.LSBF = 0; //MSB first
RSPI0.SPCMD0.BIT.SPNDEN = 0; //Disable next-access delay
RSPI0.SPCMD0.BIT.SLNDEN = 0; //Disable SSL negation delay
RSPI0.SPCMD0.BIT.SCKDEN = 0; //An RSPCK delay of 1 RSPCK
//SPCR register
RSPI0.SPCR.BIT.SPMS = 1; //SPI operation (four-wire)
RSPI0.SPCR.BIT.TXMD = 0; //Full-duplex operation
RSPI0.SPCR.BIT.MODFEN = 0; //Disable detection of mode fault error
RSPI0.SPCR.BIT.MSTR = 1; //Master mode
RSPI0.SPCR.BIT.SPEIE = 0; //Disable error interrupt requests
RSPI0.SPCR.BIT.SPTIE = 1; //enable transmit interrupt requests
RSPI0.SPCR.BIT.SPRIE = 1; //enable receive interrupt requests
RSPI0.SPCR.BIT.SPE = 1; //Enable RSPI function
//SSLP register
RSPI0.SSLP.BIT.SSLP0 = 1; //SSL0 signal is 1 active
RSPI0.SSLP.BIT.SSLP1 = 1; //SSL1 signal is 1 active
RSPI0.SSLP.BIT.SSLP2 = 1; //SSL2 signal is 1 active
RSPI0.SSLP.BIT.SSLP3 = 1; //SSL3 signal is 1 active
//SPSCR register
RSPI0.SPSCR.BIT.SPSLN = 0; //RSPI
sequence
}
6.- Inicializamos la LCD con la función en main.c
void SR_LCD_GRAPH(void)
{
LCDInit();
LCDClear();
//LCDTest2();
LCDFont(FONT_LARGE);
}
7.- La función de envió se muestra a continuación y está en el archivo r_cg_serial_SPI.c:
PASOS:
